Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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88 IP
51
0.0
RISC-V 32-bit Low-Power CPU IP With Smepmp & Zicbom, Comparable To M4
TGE320 - A low-power, high-performance 32-bit RISC-V processor designed for embedded applications, featuring RV32P support, Zicbom cache management, a...
52
0.0
RISC-V 32-bit Low-Power General-Purpose Processor, Comparable To M3
TGE310 - A low-power, cost-effective 32-bit RISC-V embedded general-purpose processor. 32 Bit, 3-stage, RV32 EMZc/C, TIM, CLIC, AHB...
53
0.0
RISC-V 32-bit Ultra-Compact Embedded General-Purpose Processor, Comparable To M0
TGE100 is an ultra-low-power, ultra-compact 32-bit microprocessor based on the RISC-V instruction set architecture (ISA). As the smallest core in our ...
54
0.0
RISC-V 32-bit, 6-Stage Superscaler, Embedded Functional Safety CPU IP With ASIL-D Functional Safety Standard, Comparable To M7
TAE330 - 32‑bit RISC‑V embedded functional safety processor, built on the TGE330, enhanced with Parity/ECC, SPM, and Dual‑Core Lockstep (DCLS) feature...
55
0.0
RISC-V high performance CPU
Ventana s first generation RISC-V high performance CPU is targeted at data center, edge, and other general computing applications. The configurable CP...
56
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RISC-V processor - 32 bit, 5-stage pipeline
The L50(F) is a medium-sized, efficient 32-bit embedded RISC-V processor aimed at embedded systems with mid-range processing requirements. The core ha...
57
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RISC-V processor with vector extension certified for ISO 26262 ASIL D ready
Off-loading heavy calculations from microcontrollers The DR1000C is a parallel processor IP that is ideal for offloading high-load arithmetic process...
58
0.0
Ultra-low power consumption out-of-order commercial-grade 64-bit RISC-V CPU IP
StarFive Dubhe-70 is a 9+ stage, 3-issue, out-of-order CPU IP that supports the rich RISC-V instruction set, RV64GCBH_Zicond_Zicbom_Zicboz_Zicbop.With...
59
0.0
Ultra-low power RISC-V microcontroller CPU
High efficient instruction execution pipelineShort pipeline design for low-power applications; class leading performance.Ultra-low power, high energy ...
60
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Ultra-Low-Power Deeply Embedded RISC-V Processor
The BA51 is a highly configurable, low-power deeply embedded RISC-V processor IP core. It implements a single-issue, in-order, 2-stage execution pipel...
61
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Ultra-low-power Processor based on RISC-V
The icyflex-V is a next-generation ultra-low-power 32-bit processor core developed by CSEM, based on the RISC-V RV32IMC instruction set architecture. ...
62
0.0
Flute RISC-V Core
Flute is a free 5-stage plug-n-play RISC-V processor core delivering the key benefits of open source hardware....
63
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IMG RTXM-2200
RTXM-2200 is the first core from the Catapult range. It's a highly scalable real-time, deterministic, 32-bit embedded CPU, that is feature-rich an...
64
0.0
EMSA5-FS
EMSA5-FS is a 32-bit, in-order, single-issue, five-stage pipeline processor supporting the open standard RISC-V instruction set architecture (ISA). It...
65
0.0
AndesCore N25F-SE 32-bit CPU IP
AndesCore™ N25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications. Approved based on...
66
0.0
Entry-level APU/embedded core with Linux and SMP configurations support
Efficient 32- or 64bit Linux-capable application core with virtual memory, MMU, L1/L2 caches, coherency and SMP support...
67
0.0
Codasip L110 32-bit RISC-V embedded processor
Codasip® L110 is a 32-bit RISC-V embedded processor, focused on small-area and low-power applications.The core is highly configurable, allowing di...
68
0.0
Compact 32-bit MCU core for deeply embedded applications and accelerator control
Minimalistic 32-bit MCU core for deeply embedded applications and accelerator control. It can be configured for a very small area - under 15kGates in ...
69
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Compact and Performance Efficiency 32-bit RISC-V Core
The AndesCore™ N225 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with small gate count, and s...
70
0.0
Compact, low-power 32-bit RISC CPU
The eSi-3200 32-bit CPU is the mid-range member in the eSi-RISC family of processor cores. It is targeted specifically for low-power applications that...
71
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Low Power RISCV CPU
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72
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Low-Power Deeply Embedded RISC-V Processor
The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core. It implements a single-issue, in-order, 5-stage execution pipeline, a...
73
0.0
APS1V - Compact Implementation of the RISC-V RV32IMC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveragi...
74
0.0
FPS29V - Dual Issue Implementation of the RISC-V RV32IMAFC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveragi...
75
0.0
APS3V - Compact Implementation of the RISC-V RV32IMC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveragi...
76
0.0
APS5V - Compact Implementation of the RISC-V RV32IMAC ISA
Cortus have applied their many years of processor design expertise to the RISC-V ISA. Concentrating on the needs of the embedded designer and leveragi...
77
0.0
NS31A RISC-V 32bit CPU which supports ISO26262 ASIL D
RISC-V 32bit General Purpose Tiny Core ISO26262:2018 ASIL D compliant SEooC IP RISC-V Solution by Collaborating with Partners RISC-V 32bit General P...
78
0.0
Nuclei N100: Very tiny area 2-stage-pipeline processor for embedded applications
Entry-level 32-bit RISC-V core, one of the world's smallest RISC-V cores. Optimized for ultra-low power consumption and minimal area, targeting cost-s...
79
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Nuclei N200: Ultra-low-power 2-stage-pipeline processor for embedded applications
Mid-range 32-bit RISC-V core, the world's first general-purpose MCU based on RISC-V. Balancing power, performance and area, comparable to ARM Cortex-M...
80
0.0
Nuclei N300: Low-power 3-stage-pipeline processor with DSP/FPU capable for embedded applications
High-performance 32-bit RISC-V core, Nuclei's most widely adopted, feature-rich embedded core. Suitable for complex real-time embedded applications, w...
81
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Nuclei N600(SMP): 32-bit high-efficiency 6-stage-pipeline processor with DSP/FPU capable for embedded and real-time applications
32-bit high-efficiency multi-core processor without MMU, comparable to ARM Cortex-R4/R5, based on the Nuclei 600 Series architecture, supporting 2–4 c...
82
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Nuclei NS100: 32-bit ultra-low-power 2-stage-pipeline secure processor for EAL 5+ secure embedded applications
32-bit ultra-low-power RISC-V core, designed for ultra-low-power MCU, IoT and other low-power applications. A competitive rival to ARM SC000, with mi...
83
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Nuclei NS300: 32-bit low-power 3-stage-pipeline secure processor for EAL 5+ secure embedded applications
32-bit security-enhanced low-power RISC-V core, evolved from Nuclei N300 with enhanced security features. A competitive rival to ARM SC300/M35P, combi...
84
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Nuclei U600(SMP): 32-bit high-efficiency 6-stage-pipeline processor (with MMU) for Linux-capable applications
32-bit high-efficiency RISC-V core with MMU, belonging to Nuclei 600 Series. Comparable to ARM Cortex-A5/A7, supporting 32-bit Linux system, balancing...
85
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Nuclei U900(SMP): 32-bit high-efficiency 9-stage-pipeline processor (with MMU) for Linux-capable applications
32-bit high-performance RISC-V core with MMU, belonging to Nuclei 900 Series. Comparable to ARM Cortex-A7/A9, supporting 32-bit Linux system, dual-iss...
86
0.0
RV32EC_P2 Processor Core IP
IQonIC Works RV32EC_P2 Core is a 2-stage pipeline RISC-V processor core, designed to meet the needs of small, low-power embedded applications, running...
87
0.0
RV32IC_P5 Processor Core IP
IQonIC Works RV32IC_P5 Core is a larger, 5-stage pipeline core RISC-V processor, designed to meet the needs of medium-scale embedded applications that...
88
0.0
SweRV EH1 Support Package
The SweRV EH1 Support package (SSP) contains everything needed to deploy a Western Digital SweRV EH1 core in an integrated circuit providing support f...